(1) Field of the Invention
The present invention generally relates to an amplifier system, and more particularly to an improvement of an amplifier system including an emitter follower unit and a constant current unit, the constant current unit producing a constant current being fed from the emitter follower unit.
(2) Description of the Related Art
An amplifier system, such as a buffer amplifier system, is installed into a semiconductor device for use. Recently, there is an increasing demand for a semiconductor device which operates with a low voltage level and a small power consumption. Therefore, it is desirable to provide an amplifier system which can be driven with a low voltage level and a small current consumption, for use in the semiconductor device.
FIG. 1 shows an example of a conventional buffer amplifier system. As shown in FIG. 1, the conventional buffer amplifier system 1 comprises a capacitor C1, a resistor R1, a resistor R2, a resistor R3, and an NPN transistor Q1.
The conventional buffer amplifier system 1 has an input terminal Tin to which an input signal from a signal source 2 is supplied, a source voltage terminal Tvcc to which a source voltage Vcc from a source voltage supply (not shown) is supplied, and an output terminal Tout to which an output signal from the NPN transistor Q1 is supplied. The NPN transistor Q1 has a base connected to the input terminal Tin, a collector connected to the source voltage terminal Tvcc, and an emitter connected to the output terminal Tout. As shown, the above-mentioned elements constitute an emitter follower unit.
The capacitor C1 is connected at one end to the input terminal Tin and connected at the other end to the base of the NPN transistor Q1. The capacitor C1 removes a DC (direct current) component of the input signal which the signal source 2 supplies, and the input signal from the capacitor C1 is supplied to the base of the NPN transistor Q1.
The resistor R1 is connected at one end to the base of the NPN transistor Q1 and connected at the other end to the source voltage terminal Tvcc. The source voltage Vcc from the source voltage terminal Tvcc is supplied to the buffer amplifier system 1, as shown in FIG. 1. The resistor R2 is connected at one end to the base of the NPN transistor Q1, and the other end of the resistor R2 is grounded. The resistors R1 and R2 are connected to each other at a connection point where the capacitor C1 and the base of the NPN transistor Q1 are connected. The source voltage Vcc is supplied to the resistor R1, and the resistors R1 and R2 serve as a voltage divider of the source voltage Vcc. Thus, a bias voltage is produced at the connection point by the resistors R1 and R2.
Since the input terminal Tin is connected to the connection point between the resistors R1 and R2 via the capacitor C1, the input signal from the capacitor C1 is biased by the bias voltage at the connection point, and the resulting input signal is supplied to the base of the NPN transistor Q1.
In the NPN transistor Q1, the base is connected to the input terminal Tin via the capacitor C1, the collector is connected to the source voltage terminal Tvcc, and the emitter is connected to the output terminal Tout. Also, the emitter of the NPN transistor Q1 is grounded via the resistor R3. The resistor R3 is a load resistor, and a constant current is fed from the emitter of the NPN transistor Q1 into the resistor R3.
The NPN transistor Q1 produces the output signal at the emitter in response to the input signal at the base, and an emitter current (or the constant current mentioned above) is fed from the emitter into the resistor R3. The output terminal Tout to which the output signal from the NPN transistor Q1 is supplied is connected to a connection point at which the resistor R3 and the emitter of the NPN transistor Q1 are connected to each other.
In the NPN transistor Q1, an emitter current, the amount of which is, for example, "k" times as large as the amount of a base current fed into the base, is fed from the emitter. "k" is called a ratio of current amplification of the buffer amplifier system. The NPN transistor Q1 supplies an output signal, produced at the emitter in accordance with the emitter current, to the output terminal Tout.
When the input signal supplied to the NPN transistor Q1 is increased, the emitter current is increased so that the level of the output signal from the NPN transistor Q1 ascends. On the other hand, when the input signal is decreased, the emitter current is decreased so that the level of the output signal descends.
In the buffer amplifier system 1 of FIG. 1, a capacitor CL is connected at one end to the output terminal Tout and connected at the other end to a load resistor RL. The capacitor CL removes a DC component of the output signal supplied to the output terminal Tout, and a current in accordance with the output signal is fed into the load resistor RL.
FIG. 2 shows another example of the conventional buffer amplifier system. In FIG. 2, the elements which are the same as corresponding elements in FIG. 1 are designated by the same reference numerals, and a description thereof will be omitted.
As shown in FIG. 2, the conventional buffer amplifier system 11 comprises the capacitor C1, the resistor R1, the resistor R2, the NPN transistor Q1, and a current mirror unit 12.
The current mirror unit 12 is a constant current unit which produces a constant current in response to the source voltage Vcc, the constant current being fed from the emitter of the NPN transistor Q1 into the current mirror unit 12. The current mirror unit 12 of FIG. 2 can produce the constant current with a high level of accuracy.
The current mirror unit 12 comprises an NPN transistor Q11, an NPN transistor Q12, and a resistor R11. The NPN transistor Q11 has a collector which is connected to the emitter of the NPN transistor Q1, an emitter which is grounded, and a base which is connected to a base of the NPN transistor Q12.
The NPN transistor Q12 has a collector which is connected to the source voltage terminal Tvcc via the resistor R11, the base which is connected to the base of the NPN transistor Q11, and an emitter which is grounded. The NPN transistor Q12 has the base and the collector which are connected to each other by a connecting wire, and the NPN transistor Q12 forms a diode. The collector of the NPN transistor Q12 and the base of the NPN transistor Q12 are set at the same voltage level by the connecting wire.
In the current mirror unit 12, the source voltage Vcc is supplied to the resistor R11, and the emitters of the NPN transistors Q11 and Q12 are grounded. A base current is fed into the base of the NPN transistor Q12. The NPN transistor Q12 is driven by the base current, and a collector current is fed into the collector of the NPN transistor Q12. Since the base of the NPN transistor Q11 is connected to the base of the NPN transistor Q12, a constant current which is the same as the collector current of the NPN transistor Q12 is fed from the emitter of the NPN transistor Q1 into the collector of the NPN transistor Q11.
Accordingly, the current mirror unit 12 produces a constant current in response to the source voltage Vcc from the source voltage terminal Tvcc, the constant current being fed from the emitter of the NPN transistor Q1 into the collector of the NPN transistor Q11. By using the current mirror unit 12, it is possible to make stable the flow of the constant current fed from the emitter of the NPN transistor Q1 into the current mirror unit 12. Thus, the conventional buffer amplifier system 11 of FIG. 2 can amplify the input signal into the output signal with a high level of accuracy.
FIG. 3 shows a further example of the conventional buffer amplifier system. In FIG. 3, the elements which are the same as corresponding elements in FIG. 1 are designated by the same reference numerals, and a description thereof will be omitted.
As shown in FIG. 3, the conventional buffer amplifier system 21 comprises the capacitor C1, an NPN transistor Q21, an NPN transistor Q22, a PNP transistor Q23, a PNP transistor Q24, a resistor R21, and a resistor R22.
The conventional buffer amplifier system 21 has the input terminal Tin to which an input signal from a signal source 22 is supplied, and the source voltage terminal Tvcc to which a source voltage Vcc from a source voltage supply (not shown) is supplied.
The capacitor C1 is connected at one end to the input terminal Tin and connected at the other end to an emitter of the NPN transistor Q21 and an emitter of the PNP transistor Q23. The NPN transistor Q21 has a base and a collector which are connected to each other by a connecting wire, and the NPN transistor Q21 forms a diode. In the NPN transistor Q21, the base and the collector are connected to the source voltage terminal Tvcc via the resistor R21, and the emitter is connected to the input terminal Tin via the capacitor C1.
The PNP transistor Q23 has a base and a collector which are connected to each other by a connecting wire, and the PNP transistor Q23 forms a diode. In the PNP transistor Q23, the emitter is connected to the input terminal Tin via the capacitor C1, and the base and the collector are grounded via the resistor R22.
The source voltage Vcc is supplied to the resistor R21, and the resistor R22 is grounded. The resistor R21, the NPN transistor Q21, the PNP transistor Q22 and the resistor R22 are connected in series. The NPN transistor Q21 produces a first intermediate voltage at a connection point between the resistor R21 and the NPN transistor Q21 from the voltage of the input signal, the first intermediate voltage being biased in the forward direction from the center voltage of the input signal. The PNP transistor Q22 produces a second intermediate voltage at a connection point between the PNP transistor Q22 and the resistor R22 from the voltage of the input signal, the second intermediate voltage being biased in the reverse direction from the center voltage of the input signal.
The first intermediate voltage at the connection point between the resistor R21 and the NPN transistor Q21 is supplied to the base of the NPN transistor Q22. Also, the second intermediate voltage at the connection point between the PNP transistor Q23 and the resistor R22 is supplied to the base of the PNP transistor Q24.
The NPN transistor Q22 has a collector which is connected to the source voltage terminal Tvcc, and an emitter which is connected to the output terminal Tout. The first intermediate voltage biased in the forward direction from the center voltage of the input signal is supplied to the base of the NPN transistor Q22, and the NPN transistor Q22 produces an output signal at the emitter. The output signal from the emitter of the NPN transistor Q22 is supplied to the output terminal Tout.
The PNP transistor Q24 has a collector which is grounded, and an emitter which is connected to the output terminal Tout. The second intermediate voltage biased in the reverse direction from the center voltage of the input signal is supplied to the base of the PNP transistor Q24, and the PNP transistor Q24 produces an output signal at the emitter, the output signal being the same as that at the emitter of the NPN transistor Q22.
The conventional buffer amplifier system of FIG. 3 is called a single-end push-pull amplifier circuit. The voltage of the input signal is amplified into the positive side and the negative side of the center voltage of the input signal separately. The conventional buffer amplifier system of FIG. 3 can produce an adequately high level of the output signal from the input signal.
However, when the above-described buffer amplifier systems of FIGS.1, 2 and 3 are used with a low voltage level and a small current consumption, the output signal produced by these systems will be at a too low level. It is difficult to avoid the lowering of the level of the output signal when the above-described amplifier systems are used.